The application relates to a semiconductor device with a first semiconductor layer of a first conductivity type. The semiconductor device includes a second semiconductor layer of a second conductivity type complementary to the first conductivity type, the second semiconductor layer being arranged in or on the first semiconductor layer. This second semiconductor layer includes a region of the first conductivity type. A first electrode contacts this region of the first conductivity type and the second semiconductor layer. In addition, at least one trench extends through the second semiconductor layer into the first semiconductor layer.
Such a semiconductor device therefore has the basic structure of an IGBT (insulated gate bipolar transistor) or a MOSFET. In the development of new generations of such semiconductor devices the on-state losses VCE, sat are to be reduced. In principle, this can be achieved by increasing the channel width while retaining the same carrier profile in the first semiconductor layer. This, however, also increases the short circuit current, so that the semiconductor device can be destroyed prematurely in a short circuit situation before a suitable gate driver can switch off the semiconductor device.
A measure for the prevention of latch-up is known wherein a diverter structure is provided in the region of the trench base, the structure being of the complementary conductivity type and doped more highly than the surrounding drift zone of the first semiconductor layer. For this purpose, the diverter structure is connected to the first electrode via a resistor. Through this connection, however, holes can leak away even in the on-state, whereby VCE, sat is increased significantly in a suitably conductive connection.
In another known method, a p-type region located on a trench side opposite the channel is connected to the emitter potential via a diode, a resistor or a MOS transistor. The EMI (electromagnetic interference) behavior can thereby be improved in the switching-on of such a semiconductor device without discharging via this p-type region of the second semiconductor layer in the on-state a hole current so high that the charge carrier flooding or the short circuit current in the on-state would be reduced significantly.